framework for later dev
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3
.gitignore
vendored
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3
.gitignore
vendored
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**/tmp/
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**/test/
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**/obj_dir/
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7
LICENSE
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7
LICENSE
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Copyright 2025 Peisong Xiao
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Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the “Software”), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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47
src/testbench/bitstream.sv
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47
src/testbench/bitstream.sv
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`include <bitstream.svh>
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`include <params.svh>
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task bitstream::append_packet(input Packet pkt);
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for (int i = 0; i < PACKET_SIZE; i++) begin
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this.append_byte(pkt.get_pos(i));
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end
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endtask : append_packet
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task bitstream::append_byte(input byte data);
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for (int i = 0; i < 8; i++) begin
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this.queue.push_back(data[i]);
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end
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endtask : append_byte
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task bitstream::append_bit(input bit data);
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this.queue.push_back(data);
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endtask : append_bit
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task bitstream::parse_packets(ref Packet results[]);
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Packet pkt_tmp;
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bit bit_tmp[PACKET_SIZE * 8];
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int curr = 0;
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logic in_packet = 0;
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for (int i = 0; i < this.queue.size(); i = i + 8) begin
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if ((!in_packet) & (this.queue[i:i + 7] == 0))
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continue;
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in_packet = 1;
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bit_tmp[curr:curr + 7] = this.queue[i:i + 7];
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curr = curr + 8;
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if (curr == PACKET_SIZE * 8) begin
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pkt_tmp.construct(bit_tmp);
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results.push_back(pkt_tmp);
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curr = 0;
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in_packet = 0;
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end
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end
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endtask : parse_packets
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task bitstream::trim();
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while (this.queue.size() >= 8 & this.queue[0:7] == 0)
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for (int i = 0; i < 8; i++)
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this.queue.pop_front();
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endtask : trim
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20
src/testbench/bitstream.svh
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src/testbench/bitstream.svh
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`ifndef __BITSTREAM_SVH__
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`define __BITSTREAM_SVH__
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`include <packet.svh>
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class bitstream;
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bit queue[$];
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extern task append_packet(input Packet pkt);
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extern task append_byte(input byte data);
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extern task append_bit(input bit data);
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extern task parse_packets(ref Packet results[]);
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extern task trim();
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function int size();
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return this.queue.size();
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endfunction : size
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endclass : bitstream
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`endif
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72
src/testbench/packet.sv
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72
src/testbench/packet.sv
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`include <packet.svh>
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function void Packet::init(byte command, byte src, byte dest);
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this.data[0] = command;
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this.data[1] = dest;
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this.data[2] = src;
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for (int i = 3; i < PACKET_SIZE; i++) begin
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this.data[i] = $urandom_range(0, 255)[7:0];
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end
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endfunction : init
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function void Packet::construct(bit [PACKET_SIZE * 8 - 1: 0] stream);
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for (int i = 0; i < PACKET_SIZE * 8; i++) begin
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this.data[i] = stream[i +: 8];
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end
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endfunction : construct
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function void Packet::iterate();
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if (this.pkt_addr != PACKET_SIZE)
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this.pkt_addr++;
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endfunction : iterate
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function void Packet::reset();
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this.pkt_addr = 0;
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endfunction : reset
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function int Packet::addr();
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return this.pkt_addr;
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endfunction : addr
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function logic Packet::is_complete();
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return this.pkt_addr == PACKET_SIZE;
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endfunction : is_complete
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function void Packet::append(byte dat);
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if (this.pkt_addr != PACKET_SIZE) begin
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this.data[this.pkt_addr] = dat;
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this.pkt_addr++;
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end
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endfunction : append
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function byte Packet::get();
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if (this.pkt_addr != 0)
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return this.data[this.pkt_addr - 1];
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return 8'hFF;
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endfunction : get
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function byte Packet::get_pos(int pos);
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if (pos >= 0 && pos < PACKET_SIZE)
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return this.data[pos];
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return 8'hFF;
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endfunction : get_pos
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function bit Packet::get_bit(int pos);
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if (pos >= 0 && pos <= PACKET_SIZE * 8)
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return this.data[pos / 8][pos % 8];
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return 0;
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endfunction : get_bit
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function void Packet::set(byte dat, int pos);
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if (pos >= 0 && pos < PACKET_SIZE)
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this.data[pos] = dat;
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endfunction : set
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function logic Packet::compare(Packet other);
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for (int i = 0; i < PACKET_SIZE; i++) begin
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if (this.data[i] != other.data[i])
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return 0;
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end
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return 1;
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endfunction : compare
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29
src/testbench/packet.svh
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29
src/testbench/packet.svh
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`ifndef __PACKET_SVH__
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`define __PACKET_SVH__
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`include <params.svh>
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class Packet;
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int pkt_addr;
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byte data [PACKET_SIZE];
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function new();
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pkt_addr = 0;
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endfunction // new
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extern function void init(byte command, byte src, byte dest);
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extern function void construct(bit stream[]);
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extern function void iterate();
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extern function void reset();
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extern function int addr();
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extern function logic is_complete();
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extern function void append(byte dat);
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extern function byte get();
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extern function byte get_pos(int pos);
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extern function bit get_bit(int pos);
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extern function void set(byte dat, int pos);
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extern function logic compare(Packet other);
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endclass : Packet
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`endif
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26
src/testbench/params.svh
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26
src/testbench/params.svh
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`ifndef __PARAMS_SVH__
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`define __PARAMS_SVH__
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parameter int PACKET_SIZE = 64;
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parameter int PACKET_ADDR_LEN = 6;
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parameter int ROSE_ADDR_LEN = 8;
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parameter logic [PACKET_ADDR_LEN - 1:0] ROSE_DEST_INDEX = 1;
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parameter logic [7:0] TX_DEFAULT = 8'b00101010;
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parameter shortint QUEUE_SIZE = 1024;
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parameter int QUEUE_ADDR_LEN = 10;
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parameter int MEMORY_POOL_SIZE = QUEUE_SIZE * PACKET_SIZE;
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parameter int MEMORY_POOL_ADDR_LEN = QUEUE_ADDR_LEN + PACKET_ADDR_LEN;
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parameter int MEMORY_POOL_ADDR_SHIFT = 4;
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parameter int INTERFACE_QUEUE_SIZE = 512;
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parameter int INTERFACE_QUEUE_ADDR_LEN = 9;
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parameter int INTERFACE_CNT = 4;
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parameter int INTERFACE_ADDR_LEN = 2;
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parameter int CRC_BITS = 8;
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parameter shortint NEW_SLOT_COOLDOWN = 500;
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parameter shortint RX_LOAD_COOLDOWN = 4;
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parameter shortint TX_LOAD_COOLDOWN = 4;
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`endif
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15
src/testbench/spi.sv
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15
src/testbench/spi.sv
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`include <spi.svh>
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task spi::send(ref bitstream stream);
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for (int i = 0; i < stream.queue.size(); i++) begin
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@ (posedge ports.sclk);
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ports.mosi = stream.queue[i];
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end
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endtask : send
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task spi::recv(input int threshold, ref bitstream stream);
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for (int i = 0; i < threshold; i++) begin
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@ (negedge ports.sclk);
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stream.append_bit(ports.miso);
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end
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endtask : recv
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26
src/testbench/spi.svh
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src/testbench/spi.svh
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`ifndef __SPI_SVH__
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`define __SPI_SVH__
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`include <bitstream.svh>
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interface spi_ports;
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logic mosi;
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logic miso;
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logic sclk;
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logic cs_n;
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endinterface : spi_ports
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class spi;
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virtual spi_ports ports;
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function new(virtual spi_ports _ports);
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ports = _ports;
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endfunction // new
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extern task send(ref bitstream stream);
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extern task recv(input int threshold, ref bitstream stream);
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endclass : spi
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`endif
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11
src/testbench/utils.svh
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src/testbench/utils.svh
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`ifndef __UTILS_SVH__
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`define __UTILS_SVH__
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`include <params.svh>
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`include <packet.svh>
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function automatic logic get_bit(input Packet pkt, input int pos);
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if (pos <= 0 | pos >=
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endfunction // get_bit
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`endif
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