made copies of Makefile so that you can also use it in both bin and src
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33
bin/Makefile
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33
bin/Makefile
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# Universal makefile for single C++ program
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#
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# Use gcc flag -MMD (user) or -MD (user/system) to generate dependencies among source files.
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# Use make default rules for commonly used file-name suffixes and make variables names.
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#
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# % make [ a.out ]
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########## Variables ##########
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CXX = g++ # compiler
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CXXFLAGS = -std=c++20 -g -Wall -MMD -O0 # compiler flags
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MAKEFILE_NAME = ${firstword ${MAKEFILE_LIST}} # makefile name
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SOURCES = $(wildcard ../src/*.cc) # source files (*.cc)
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OBJECTS = ${SOURCES:.cc=.o} # object files forming executable
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DEPENDS = ${OBJECTS:.o=.d} # substitute ".o" with ".d"
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EXEC = cc3k # executable name
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########## Targets ##########
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.PHONY : clean # not file names
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${EXEC} : ${OBJECTS} # link step
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${CXX} ${CXXFLAGS} -O0 $^ -o $@ -lncurses # additional object files before $^
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${OBJECTS} : ${MAKEFILE_NAME} # OPTIONAL : changes to this file => recompile
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# make implicitly generates rules to compile C++ files that generate .o files
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-include ${DEPENDS} # include *.d files containing program dependences
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clean : # remove files that can be regenerated
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rm -f ${DEPENDS} ${OBJECTS} ${EXEC}
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33
src/Makefile
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33
src/Makefile
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@ -0,0 +1,33 @@
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# Universal makefile for single C++ program
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#
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# Use gcc flag -MMD (user) or -MD (user/system) to generate dependencies among source files.
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# Use make default rules for commonly used file-name suffixes and make variables names.
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#
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# % make [ a.out ]
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########## Variables ##########
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CXX = g++ # compiler
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CXXFLAGS = -std=c++20 -g -Wall -MMD -O0 # compiler flags
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MAKEFILE_NAME = ${firstword ${MAKEFILE_LIST}} # makefile name
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SOURCES = $(wildcard *.cc) # source files (*.cc)
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OBJECTS = ${SOURCES:.cc=.o} # object files forming executable
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DEPENDS = ${OBJECTS:.o=.d} # substitute ".o" with ".d"
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EXEC = ../bin/cc3k # executable name
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########## Targets ##########
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.PHONY : clean # not file names
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${EXEC} : ${OBJECTS} # link step
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${CXX} ${CXXFLAGS} -O0 $^ -o $@ -lncurses # additional object files before $^
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${OBJECTS} : ${MAKEFILE_NAME} # OPTIONAL : changes to this file => recompile
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# make implicitly generates rules to compile C++ files that generate .o files
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-include ${DEPENDS} # include *.d files containing program dependences
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clean : # remove files that can be regenerated
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rm -f ${DEPENDS} ${OBJECTS} ${EXEC}
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