mirror of
https://github.com/ggml-org/llama.cpp.git
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* CUDA: kernel for larger batch sizes for MoE * WIP * WIP * WIP * WIP * WIP * WIP * fixup * tests * Move mmq_ids_helper to mmid * cleanup * Remove redundant checks
158 lines
6.2 KiB
Plaintext
158 lines
6.2 KiB
Plaintext
#include "ggml.h"
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#include "mmf.cuh"
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#include "mmid.cuh"
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void ggml_cuda_mul_mat_f(ggml_backend_cuda_context & ctx, const ggml_tensor * src0, const ggml_tensor * src1, const ggml_tensor * ids, ggml_tensor * dst) {
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GGML_ASSERT( src1->type == GGML_TYPE_F32);
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GGML_ASSERT(!ids || ids->type == GGML_TYPE_I32);
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GGML_ASSERT( dst->type == GGML_TYPE_F32);
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GGML_TENSOR_BINARY_OP_LOCALS;
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const size_t ts_src0 = ggml_type_size(src0->type);
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const size_t ts_src1 = ggml_type_size(src1->type);
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const size_t ts_dst = ggml_type_size(dst->type);
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GGML_ASSERT(ne13 == ne3);
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GGML_ASSERT( nb00 == ts_src0);
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GGML_ASSERT( nb10 == ts_src1);
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GGML_ASSERT(!ids || ids->nb[0] == ggml_type_size(ids->type));
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GGML_ASSERT( nb0 == ts_dst);
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const float * src1_d = (const float *) src1->data;
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const int32_t * ids_d = ids ? (const int32_t *) ids->data : nullptr;
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float * dst_d = (float *) dst->data;
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const int64_t s01 = src0->nb[1] / ts_src0;
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const int64_t s11 = src1->nb[1] / ts_src1;
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const int64_t s1 = dst->nb[1] / ts_dst;
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const int64_t s02 = src0->nb[2] / ts_src0;
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const int64_t s12 = src1->nb[2] / ts_src1;
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const int64_t s2 = dst->nb[2] / ts_dst;
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const int64_t s03 = src0->nb[3] / ts_src0;
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const int64_t s13 = src1->nb[3] / ts_src1;
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const int64_t s3 = dst->nb[3] / ts_dst;
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const int64_t ids_s0 = ids ? ids->nb[0] / ggml_type_size(ids->type) : 0;
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const int64_t ids_s1 = ids ? ids->nb[1] / ggml_type_size(ids->type) : 0;
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mmf_ids_data ids_info{};
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mmf_ids_data * ids_info_ptr = nullptr;
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ggml_cuda_pool_alloc<int32_t> ids_src_compact_dev;
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ggml_cuda_pool_alloc<int32_t> ids_dst_compact_dev;
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ggml_cuda_pool_alloc<int32_t> expert_bounds_dev;
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// For MUL_MAT_ID the memory layout is different than for MUL_MAT:
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const int64_t ncols_dst = ids ? ne2 : ne1;
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const int64_t nchannels_dst = ids ? ne1 : ne2;
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const int64_t stride_col_dst = ids ? s2 : s1;
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const int64_t stride_col_y = ids ? s12 : s11;
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const int64_t stride_channel_dst = ids ? s1 : s2;
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int64_t stride_channel_y = ids ? s11 : s12;
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int64_t nchannels_y = ids ? ne11 : ne12;
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//mul_mat_id: handle broadcast
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if (ids && nchannels_y == 1) {
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stride_channel_y = 0;
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nchannels_y = ids->ne[0];
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}
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if (ids && ncols_dst > 16) {
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const int64_t n_expert_used = ids->ne[0];
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const int64_t n_experts = ne02;
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const int64_t n_tokens = ne12;
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const int64_t ne_get_rows = n_tokens * n_expert_used;
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ids_src_compact_dev.alloc(ctx.pool(), ne_get_rows);
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ids_dst_compact_dev.alloc(ctx.pool(), ne_get_rows);
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expert_bounds_dev.alloc(ctx.pool(), n_experts + 1);
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const int si1 = static_cast<int>(ids_s1);
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const int sis1 = static_cast<int>(src1->nb[2] / src1->nb[1]);
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GGML_ASSERT(sis1 > 0);
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ggml_cuda_launch_mm_ids_helper(ids_d, ids_src_compact_dev.get(), ids_dst_compact_dev.get(), expert_bounds_dev.get(),
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static_cast<int>(n_experts), static_cast<int>(n_tokens), static_cast<int>(n_expert_used), static_cast<int>(ne11), si1, sis1, ctx.stream());
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CUDA_CHECK(cudaGetLastError());
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ids_info.ids_src_compact = ids_src_compact_dev.get();
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ids_info.ids_dst_compact = ids_dst_compact_dev.get();
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ids_info.expert_bounds_dev = expert_bounds_dev.get();
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ids_info.n_experts = static_cast<int>(n_experts);
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ids_info.sis1 = sis1;
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ids_info_ptr = &ids_info;
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}
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switch (src0->type) {
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case GGML_TYPE_F32: {
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const float * src0_d = (const float *) src0->data;
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constexpr int vals_per_T = 1;
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mul_mat_f_switch_cols_per_block(
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src0_d, src1_d, ids_d, dst_d, ne00/vals_per_T, ne01, ncols_dst, s01/vals_per_T, stride_col_y/vals_per_T, stride_col_dst,
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ids_s0, ids_s1, ne02, nchannels_y, nchannels_dst, s02/vals_per_T, stride_channel_y, stride_channel_dst,
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ne03, ne3, s03/vals_per_T, s13, s3, ctx.stream(), ids_info_ptr);
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} break;
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case GGML_TYPE_F16: {
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const half2 * src0_d = (const half2 *) src0->data;
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constexpr int vals_per_T = 2;
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mul_mat_f_switch_cols_per_block(
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src0_d, src1_d, ids_d, dst_d, ne00/vals_per_T, ne01, ncols_dst, s01/vals_per_T, stride_col_y/vals_per_T, stride_col_dst,
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ids_s0, ids_s1, ne02, nchannels_y, nchannels_dst, s02/vals_per_T, stride_channel_y, stride_channel_dst,
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ne03, ne3, s03/vals_per_T, s13, s3, ctx.stream(), ids_info_ptr);
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} break;
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case GGML_TYPE_BF16: {
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const nv_bfloat162 * src0_d = (const nv_bfloat162 *) src0->data;
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constexpr int vals_per_T = 2;
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mul_mat_f_switch_cols_per_block(
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src0_d, src1_d, ids_d, dst_d, ne00/vals_per_T, ne01, ncols_dst, s01/vals_per_T, stride_col_y/vals_per_T, stride_col_dst,
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ids_s0, ids_s1, ne02, nchannels_y, nchannels_dst, s02/vals_per_T, stride_channel_y, stride_channel_dst,
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ne03, ne3, s03/vals_per_T, s13, s3, ctx.stream(), ids_info_ptr);
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} break;
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default:
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GGML_ABORT("unsupported type: %s", ggml_type_name(src0->type));
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}
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}
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bool ggml_cuda_should_use_mmf(enum ggml_type type, int cc, int warp_size, const int64_t * src0_ne, const int src1_ncols, bool mul_mat_id) {
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if (ggml_is_quantized(type)) {
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return false;
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}
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if (src0_ne[0] % (warp_size * (4/ggml_type_size(type))) != 0) {
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return false;
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}
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if (src0_ne[1] % MMF_ROWS_PER_BLOCK != 0) {
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return false;
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}
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if (mul_mat_id) {
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if (src0_ne[1] <= 1024 && src1_ncols > 512) {
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return false;
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} else if(src0_ne[1] > 1024 && src1_ncols > 128) {
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return false;
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}
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} else {
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if (src1_ncols > 16) {
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return false;
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}
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}
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switch (type) {
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case GGML_TYPE_F32:
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return ampere_mma_available(cc);
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case GGML_TYPE_F16:
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return turing_mma_available(cc);
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case GGML_TYPE_BF16:
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return ampere_mma_available(cc);
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default:
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return false;
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}
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}
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