mirror of
https://github.com/ggml-org/llama.cpp.git
synced 2025-11-03 09:22:01 +00:00
1f0dabda8d
* CUDA: int8 tensor cores for MMQ (legacy quants) * fix out-of-bounds writes * __builtin_assume -> GGML_CUDA_ASSUME * fix writeback returning too early
398 lines
15 KiB
Plaintext
398 lines
15 KiB
Plaintext
#include "common.cuh"
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#include "fattn-common.cuh"
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template<int D, int ncols, int parallel_blocks, ggml_type type_K, ggml_type type_V> // D == head size
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#if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
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__launch_bounds__(D, 1)
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#endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
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static __global__ void flash_attn_vec_ext_f16(
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const char * __restrict__ Q,
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const char * __restrict__ K,
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const char * __restrict__ V,
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const char * __restrict__ mask,
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float * __restrict__ dst,
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float2 * __restrict__ dst_meta,
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const float scale,
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const float max_bias,
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const float m0,
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const float m1,
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const uint32_t n_head_log2,
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const int ne00,
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const int ne01,
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const int ne02,
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const int ne03,
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const int ne10,
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const int ne11,
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const int ne12,
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const int ne13,
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const int ne31,
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const int nb31,
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const int nb01,
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const int nb02,
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const int nb03,
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const int nb11,
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const int nb12,
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const int nb13,
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const int nb21,
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const int nb22,
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const int nb23,
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const int ne0,
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const int ne1,
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const int ne2,
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const int ne3) {
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#ifdef FP16_AVAILABLE
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//In this kernel Q, K, V are matrices while i, j, k are matrix indices.
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constexpr vec_dot_KQ_f16_t vec_dot_KQ = get_vec_dot_KQ_f16<D>(type_K);
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constexpr bool Q_q8_1 = type_K != GGML_TYPE_F16;
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constexpr dequantize_1_f16_t dequantize_1_v = get_dequantize_1_f16(type_V);
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const int ic0 = (blockIdx.x / parallel_blocks) * ncols; // Index of the Q/QKV column to work on.
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const int ip = blockIdx.x % parallel_blocks; // Index in group of blocks running for the same column in parallel.
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const int gqa_ratio = ne02 / ne12; // With grouped query attention there are > 1 Q matrices per K, V matrix.
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Q += nb02* blockIdx.y + nb01*ic0;
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K += nb12*(blockIdx.y / gqa_ratio);
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V += nb22*(blockIdx.y / gqa_ratio);
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const half * maskh = (const half *) mask + ne11*ic0;
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const float slopef = get_alibi_slope(max_bias, blockIdx.y, n_head_log2, m0, m1);
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const half slopeh = __float2half(slopef);
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static_assert(D % (2*WARP_SIZE) == 0, "D not divisible by 2*WARP_SIZE == 64.");
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constexpr int nwarps = D / WARP_SIZE;
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const int tid = WARP_SIZE*threadIdx.y + threadIdx.x;
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__builtin_assume(tid < D);
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__shared__ half KQ[ncols*D];
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half2 * KQ2 = (half2 *) KQ;
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half kqmax[ncols];
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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kqmax[j] = -HALF_MAX_HALF;
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}
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half kqsum[ncols] = {0.0f};
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__shared__ half kqmax_shared[ncols][WARP_SIZE];
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__shared__ half kqsum_shared[ncols][WARP_SIZE];
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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if (threadIdx.y == 0) {
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kqmax_shared[j][threadIdx.x] = -HALF_MAX_HALF;
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kqsum_shared[j][threadIdx.x] = 0.0f;
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}
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}
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__syncthreads();
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// Convert Q to half2 (f16 K) or q8_1 (quantized K) and store in registers:
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half2 Q_h2[ncols][D/(2*WARP_SIZE)];
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int Q_i32[ncols][D/(sizeof(int)*QK8_1) == 0 ? 1 : D/(sizeof(int)*QK8_1)];
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half2 Q_ds[ncols][D/QK8_1 == 0 ? 1 : D/QK8_1];
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if (Q_q8_1) {
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#pragma unroll
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for (int j0 = 0; j0 < ncols; j0 += nwarps) {
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const int j = j0 + threadIdx.y;
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if (j0 + nwarps > ncols && j >= ncols) {
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break;
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}
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// Reuse KQ as temporary storage for converting Q to q8_1:
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int * tmp_q_i32 = (int *) &KQ[j*D];
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half2 * tmp_q_ds = (half2 *) (tmp_q_i32 + D/sizeof(int));
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// Set memory to zero if out of bounds:
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if (ncols > 2 && ic0 + j >= ne01) {
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#pragma unroll
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for (int i0 = 0; i0 < D/sizeof(int); i0 += WARP_SIZE) {
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const int i = i0 + threadIdx.x;
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tmp_q_i32[i] = 0;
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}
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if (threadIdx.x < D/QK8_1) {
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tmp_q_ds[threadIdx.x] = make_half2(0.0f, 0.0f);
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}
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continue;
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}
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const float * Q_f = (const float *) (Q + j*nb01);
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#pragma unroll
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for (int i0 = 0; i0 < D/sizeof(int); i0 += WARP_SIZE) {
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quantize_q8_1_to_shared<half2>(Q_f + 4*i0, scale, tmp_q_i32, tmp_q_ds);
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}
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}
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__syncthreads();
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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int * tmp_q_i32 = (int *) &KQ[j*D];
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half2 * tmp_q_ds = (half2 *) (tmp_q_i32 + D/sizeof(int));
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#pragma unroll
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for (int i0 = 0; i0 < D/sizeof(int); i0 += WARP_SIZE) {
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const int i = i0 + threadIdx.x;
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Q_i32[j][i0/WARP_SIZE] = tmp_q_i32[i];
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Q_ds[j][i0/WARP_SIZE] = tmp_q_ds[i/QI8_1];
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}
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}
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__syncthreads();
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} else {
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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const float2 * Q_f2_j = (const float2 *) (Q + j*nb01);
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#pragma unroll
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for (int i0 = 0; i0 < D/2; i0 += WARP_SIZE) {
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const int i = i0 + threadIdx.x;
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const float2 tmp = ncols <= 2 || ic0 + j < ne01 ? Q_f2_j[i] : make_float2(0.0f, 0.0f);
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Q_h2[j][i0/WARP_SIZE] = make_half2(scale, scale) * make_half2(tmp.x, tmp.y);
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}
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}
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}
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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KQ[j*D + tid] = -HALF_MAX_HALF;
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}
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half2 VKQ[ncols] = {{0.0f, 0.0f}};
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const int k_start = parallel_blocks == 1 ? 0 : ip*D;
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for (int k_VKQ_0 = k_start; k_VKQ_0 < ne11; k_VKQ_0 += parallel_blocks*D) {
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// Calculate KQ tile and keep track of new maximum KQ values:
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// For unknown reasons using a half array of size 1 for kqmax_new causes a performance regression,
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// see https://github.com/ggerganov/llama.cpp/pull/7061 .
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// Therefore this variable is defined twice but only used once (so that the compiler can optimize out the unused variable).
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half kqmax_new = kqmax[0];
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half kqmax_new_arr[ncols];
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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kqmax_new_arr[j] = kqmax[j];
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}
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#pragma unroll
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for (int i_KQ_0 = 0; i_KQ_0 < D; i_KQ_0 += nwarps) {
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const int i_KQ = i_KQ_0 + threadIdx.y;
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if ((i_KQ_0 + nwarps > D && i_KQ >= D) || (FATTN_KQ_STRIDE % D != 0 && k_VKQ_0 + i_KQ >= ne11)) {
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break;
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}
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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half sum = vec_dot_KQ(K + (k_VKQ_0 + i_KQ)*nb11, Q_h2[j], Q_i32[j], Q_ds[j]);
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sum = warp_reduce_sum(sum);
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sum += mask ? slopeh*maskh[j*ne11 + k_VKQ_0 + i_KQ] : __float2half(0.0f);
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if (ncols == 1) {
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kqmax_new = ggml_cuda_hmax(kqmax_new, sum);
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} else {
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kqmax_new_arr[j] = ggml_cuda_hmax(kqmax_new_arr[j], sum);
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}
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if (threadIdx.x == 0) {
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KQ[j*D + i_KQ] = sum;
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}
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}
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}
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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half kqmax_new_j = ncols == 1 ? kqmax_new : kqmax_new_arr[j];
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kqmax_new_j = warp_reduce_max(kqmax_new_j);
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if (threadIdx.x == 0) {
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kqmax_shared[j][threadIdx.y] = kqmax_new_j;
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}
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}
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__syncthreads();
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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half kqmax_new_j = kqmax_shared[j][threadIdx.x];
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kqmax_new_j = warp_reduce_max(kqmax_new_j);
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const half KQ_max_scale = hexp(kqmax[j] - kqmax_new_j);
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kqmax[j] = kqmax_new_j;
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const half val = hexp(KQ[j*D + tid] - kqmax[j]);
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kqsum[j] = kqsum[j]*KQ_max_scale + val;
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KQ[j*D + tid] = val;
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VKQ[j] *= __half2half2(KQ_max_scale);
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}
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__syncthreads();
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#pragma unroll
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for (int k0 = 0; k0 < D; k0 += 2) {
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if (FATTN_KQ_STRIDE % D != 0 && k_VKQ_0 + k0 >= ne11) {
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break;
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}
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half2 V_k;
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reinterpret_cast<half&>(V_k.x) = dequantize_1_v(V + (k_VKQ_0 + k0 + 0)*nb21, tid);
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reinterpret_cast<half&>(V_k.y) = dequantize_1_v(V + (k_VKQ_0 + k0 + 1)*nb21, tid);
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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VKQ[j] += V_k*KQ2[j*(D/2) + k0/2];
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}
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}
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__syncthreads();
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}
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#pragma unroll
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for (int j = 0; j < ncols; ++j) {
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kqsum[j] = warp_reduce_sum(kqsum[j]);
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if (threadIdx.x == 0) {
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kqsum_shared[j][threadIdx.y] = kqsum[j];
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}
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}
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__syncthreads();
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#pragma unroll
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for (int j_VKQ = 0; j_VKQ < ncols; ++j_VKQ) {
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if (ncols > 2 && ic0 + j_VKQ >= ne01) {
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break;
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}
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kqsum[j_VKQ] = kqsum_shared[j_VKQ][threadIdx.x];
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kqsum[j_VKQ] = warp_reduce_sum(kqsum[j_VKQ]);
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half dst_val = (__low2half(VKQ[j_VKQ]) + __high2half(VKQ[j_VKQ]));
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if (parallel_blocks == 1) {
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dst_val /= kqsum[j_VKQ];
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}
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const int j_dst = (ic0 + j_VKQ)*parallel_blocks + ip;
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dst[j_dst*D*gridDim.y + D*blockIdx.y + tid] = dst_val;
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}
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if (parallel_blocks != 1 && tid < ncols && (ncols <= 2 || ic0 + tid < ne01)) {
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dst_meta[(ic0 + tid)*gridDim.y*parallel_blocks + blockIdx.y*parallel_blocks + ip] = make_float2(kqmax[tid], kqsum[tid]);
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}
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#else
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NO_DEVICE_CODE;
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#endif // FP16_AVAILABLE
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}
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template <int D, int cols_per_block, int parallel_blocks, ggml_type type_K, ggml_type type_V>
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void ggml_cuda_flash_attn_ext_vec_f16_case_impl(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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constexpr int nwarps = D/WARP_SIZE;
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fattn_kernel_t fattn_kernel = flash_attn_vec_ext_f16<D, cols_per_block, parallel_blocks, type_K, type_V>;
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constexpr bool need_f16_K = D != 128;
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constexpr bool need_f16_V = D != 128 && D != 64;
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launch_fattn<D, parallel_blocks>(ctx, dst, fattn_kernel, nwarps, cols_per_block, need_f16_K, need_f16_V);
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}
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template <int D, ggml_type type_K, ggml_type type_V>
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void ggml_cuda_flash_attn_ext_vec_f16_case(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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ggml_tensor * KQV = dst;
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ggml_tensor * Q = dst->src[0];
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ggml_tensor * K = dst->src[1];
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ggml_tensor * V = dst->src[2];
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const int32_t precision = KQV->op_params[2];
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GGML_ASSERT(precision == GGML_PREC_DEFAULT);
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GGML_ASSERT(K->type == type_K);
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GGML_ASSERT(V->type == type_V);
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if (Q->ne[1] == 1) {
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constexpr int cols_per_block = 1;
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constexpr int parallel_blocks = 4;
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ggml_cuda_flash_attn_ext_vec_f16_case_impl<D, cols_per_block, parallel_blocks, type_K, type_V>(ctx, dst);
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return;
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}
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if (Q->ne[1] == 2) {
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constexpr int cols_per_block = 2;
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constexpr int parallel_blocks = 4;
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ggml_cuda_flash_attn_ext_vec_f16_case_impl<D, cols_per_block, parallel_blocks, type_K, type_V>(ctx, dst);
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return;
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}
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if (Q->ne[1] <= 4) {
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constexpr int cols_per_block = 4;
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constexpr int parallel_blocks = 4;
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ggml_cuda_flash_attn_ext_vec_f16_case_impl<D, cols_per_block, parallel_blocks, type_K, type_V>(ctx, dst);
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return;
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}
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if (Q->ne[1] <= 8) {
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constexpr int cols_per_block = 8;
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constexpr int parallel_blocks = 4;
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ggml_cuda_flash_attn_ext_vec_f16_case_impl<D, cols_per_block, parallel_blocks, type_K, type_V>(ctx, dst);
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return;
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}
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constexpr int cols_per_block = 8;
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constexpr int parallel_blocks = 1;
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ggml_cuda_flash_attn_ext_vec_f16_case_impl<D, cols_per_block, parallel_blocks, type_K, type_V>(ctx, dst);
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}
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#define DECL_FATTN_VEC_F16_CASE(D, type_K, type_V) \
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template void ggml_cuda_flash_attn_ext_vec_f16_case \
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<D, type_K, type_V>(ggml_backend_cuda_context & ctx, ggml_tensor * dst) \
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extern DECL_FATTN_VEC_F16_CASE( 64, GGML_TYPE_F16, GGML_TYPE_Q4_0);
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extern DECL_FATTN_VEC_F16_CASE( 64, GGML_TYPE_F16, GGML_TYPE_Q4_1);
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extern DECL_FATTN_VEC_F16_CASE( 64, GGML_TYPE_F16, GGML_TYPE_Q5_0);
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extern DECL_FATTN_VEC_F16_CASE( 64, GGML_TYPE_F16, GGML_TYPE_Q5_1);
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extern DECL_FATTN_VEC_F16_CASE( 64, GGML_TYPE_F16, GGML_TYPE_Q8_0);
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extern DECL_FATTN_VEC_F16_CASE( 64, GGML_TYPE_F16, GGML_TYPE_F16);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_0, GGML_TYPE_Q4_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_1, GGML_TYPE_Q4_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_0, GGML_TYPE_Q4_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_1, GGML_TYPE_Q4_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q8_0, GGML_TYPE_Q4_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_F16, GGML_TYPE_Q4_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_0, GGML_TYPE_Q4_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_1, GGML_TYPE_Q4_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_0, GGML_TYPE_Q4_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_1, GGML_TYPE_Q4_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q8_0, GGML_TYPE_Q4_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_F16, GGML_TYPE_Q4_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_0, GGML_TYPE_Q5_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_1, GGML_TYPE_Q5_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_0, GGML_TYPE_Q5_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_1, GGML_TYPE_Q5_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q8_0, GGML_TYPE_Q5_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_F16, GGML_TYPE_Q5_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_0, GGML_TYPE_Q5_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_1, GGML_TYPE_Q5_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_0, GGML_TYPE_Q5_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_1, GGML_TYPE_Q5_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q8_0, GGML_TYPE_Q5_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_F16, GGML_TYPE_Q5_1);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_0, GGML_TYPE_Q8_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_1, GGML_TYPE_Q8_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_0, GGML_TYPE_Q8_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_1, GGML_TYPE_Q8_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q8_0, GGML_TYPE_Q8_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_F16, GGML_TYPE_Q8_0);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_0, GGML_TYPE_F16);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q4_1, GGML_TYPE_F16);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_0, GGML_TYPE_F16);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q5_1, GGML_TYPE_F16);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_Q8_0, GGML_TYPE_F16);
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extern DECL_FATTN_VEC_F16_CASE(128, GGML_TYPE_F16, GGML_TYPE_F16);
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extern DECL_FATTN_VEC_F16_CASE(256, GGML_TYPE_F16, GGML_TYPE_F16);
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