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			50 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			50 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
#include "pad.cuh"
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static __global__ void pad_f32(const float * x, float * dst, const int ne0, const int ne00, const int ne01, const int ne02, const int ne03) {
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    // blockIdx.z: idx of ne2*ne3, aka ne02*ne03
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    // blockIdx.y: idx of ne1
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    // blockIDx.x: idx of ne0 / BLOCK_SIZE
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    int nidx = threadIdx.x + blockIdx.x * blockDim.x;
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    if (nidx >= ne0) {
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        return;
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    }
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    // operation
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    int offset_dst =
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        nidx +
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        blockIdx.y * ne0 +
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        blockIdx.z * ne0 * gridDim.y;
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    if (nidx < ne00 && blockIdx.y < ne01 && blockIdx.z < ne02*ne03) {
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        int offset_src =
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            nidx +
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            blockIdx.y * ne00 +
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            blockIdx.z * ne00 * ne01;
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        dst[offset_dst] = x[offset_src];
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    } else {
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        dst[offset_dst] = 0.0f;
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    }
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}
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static void pad_f32_cuda(const float * x, float * dst,
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    const int ne00, const int ne01, const int ne02, const int ne03,
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    const int ne0, const int ne1, const int ne2, const int ne3, cudaStream_t stream) {
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    int num_blocks = (ne0 + CUDA_PAD_BLOCK_SIZE - 1) / CUDA_PAD_BLOCK_SIZE;
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    dim3 gridDim(num_blocks, ne1, ne2*ne3);
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    pad_f32<<<gridDim, CUDA_PAD_BLOCK_SIZE, 0, stream>>>(x, dst, ne0, ne00, ne01, ne02, ne03);
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}
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void ggml_cuda_op_pad(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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    const ggml_tensor * src0 = dst->src[0];
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    const float * src0_d = (const float *)src0->data;
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    float * dst_d = (float *)dst->data;
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    cudaStream_t stream = ctx.stream();
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    GGML_ASSERT(src0->type == GGML_TYPE_F32);
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    GGML_ASSERT(dst->type == GGML_TYPE_F32);
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    GGML_ASSERT(src0->ne[3] == 1 && dst->ne[3] == 1); // just 3D tensors
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    pad_f32_cuda(src0_d, dst_d,
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        src0->ne[0], src0->ne[1], src0->ne[2], src0->ne[3],
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        dst->ne[0], dst->ne[1], dst->ne[2], dst->ne[3], stream);
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}
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