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ggml : implement set_rows with i32 index (#16159)
* implement set_rows with i32 index * template fix * test quantized path warnings-- * Apply suggestions from code review Co-authored-by: Georgi Gerganov <ggerganov@gmail.com> * forgotten name change * deduplicate cuda/sycl and test-fix * indent++ * vulkan: support set_rows with i32 index type (#16162) * disable i32 index for webgpu for now --------- Co-authored-by: Georgi Gerganov <ggerganov@gmail.com> Co-authored-by: Jeff Bolz <jbolz@nvidia.com>
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@@ -15,8 +15,15 @@ layout (binding = 0) readonly buffer S {float data_s[];};
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#if defined(SET_ROWS)
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#include "generic_binary_head.comp"
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layout (binding = 1) readonly buffer C {uvec2 data_i[];};
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layout (binding = 1) readonly buffer C {B_TYPE data_i[];};
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layout (binding = 2) writeonly buffer Q {A_TYPE data_q[];};
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#if B_SIZE == 64
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#define DATA_I_SWIZZLE .x
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#else
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#define DATA_I_SWIZZLE
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#endif
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#else
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#include "generic_unary_head.comp"
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layout (binding = 1) writeonly buffer Q {A_TYPE data_q[];};
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@@ -259,7 +266,7 @@ void main() {
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uint i11 = fastmod(i02, p.ne11);
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uint i10 = i01;
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uint i1 = data_i[src1_idx(i10, i11, i12, 0) + get_boffset()].x;
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uint i1 = data_i[src1_idx(i10, i11, i12, 0) + get_boffset()] DATA_I_SWIZZLE;
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uint src0_idx = src0_idx(i00, i01, i02, i03) + get_aoffset();
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uint dst_idx = dst_idx(i00 / QUANT_K, i1, i02, i03) + get_doffset();
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@@ -635,8 +635,10 @@ void process_shaders() {
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}
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for (std::string t : {"f32", "f16", "bf16", "q4_0", "q4_1", "q5_0", "q5_1", "q8_0", "iq4_nl"}) {
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string_to_spv("set_rows_" + t, "copy_to_quant.comp", {{"SET_ROWS", "1"}, {"DATA_A_" + to_uppercase(t), "1"}, {"B_TYPE", "uvec2"}, {"D_TYPE", "float"}, {"FLOAT_TYPE", "float"}});
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string_to_spv("set_rows_" + t + "_rte", "copy_to_quant.comp", {{"SET_ROWS", "1"}, {"DATA_A_" + to_uppercase(t), "1"}, {"B_TYPE", "uvec2"}, {"D_TYPE", "float"}, {"FLOAT_TYPE", "float"}, {"RTE16", "1"}});
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string_to_spv("set_rows_" + t + "_i32", "copy_to_quant.comp", {{"SET_ROWS", "1"}, {"DATA_A_" + to_uppercase(t), "1"}, {"B_TYPE", "uint"}, {"B_SIZE", "32"}, {"D_TYPE", "float"}, {"FLOAT_TYPE", "float"}});
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string_to_spv("set_rows_" + t + "_i32_rte", "copy_to_quant.comp", {{"SET_ROWS", "1"}, {"DATA_A_" + to_uppercase(t), "1"}, {"B_TYPE", "uint"}, {"B_SIZE", "32"}, {"D_TYPE", "float"}, {"FLOAT_TYPE", "float"}, {"RTE16", "1"}});
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string_to_spv("set_rows_" + t + "_i64", "copy_to_quant.comp", {{"SET_ROWS", "1"}, {"DATA_A_" + to_uppercase(t), "1"}, {"B_TYPE", "uvec2"}, {"B_SIZE", "64"}, {"D_TYPE", "float"}, {"FLOAT_TYPE", "float"}});
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string_to_spv("set_rows_" + t + "_i64_rte", "copy_to_quant.comp", {{"SET_ROWS", "1"}, {"DATA_A_" + to_uppercase(t), "1"}, {"B_TYPE", "uvec2"}, {"B_SIZE", "64"}, {"D_TYPE", "float"}, {"FLOAT_TYPE", "float"}, {"RTE16", "1"}});
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}
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auto get_type_str = [](bool f16) {
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