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CUDA: faster tile FA, add oob checks, more HSs (#16492)
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@@ -245,7 +245,8 @@ static bool fp16_available(const int cc) {
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}
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static bool fast_fp16_available(const int cc) {
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return (GGML_CUDA_CC_IS_NVIDIA(cc) && fp16_available(cc) && cc != 610) || GGML_CUDA_CC_IS_AMD(cc);
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return GGML_CUDA_CC_IS_AMD(cc) ||
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(GGML_CUDA_CC_IS_NVIDIA(cc) && fp16_available(cc) && ggml_cuda_highest_compiled_arch(cc) != 610);
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}
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// To be used for feature selection of external libraries, e.g. cuBLAS.
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@@ -571,6 +572,10 @@ static __device__ __forceinline__ void ggml_cuda_mad(half2 & acc, const half2 v,
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}
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// Aligned memory transfers of 8/16 bytes can be faster than 2 transfers with 4 bytes, especially on AMD.
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// Important: do not use this function if dst and src both point at registers.
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// Due to the strict aliasing rule the compiler can do incorrect optimizations if src and dst have different types.
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// The function is intended for copies between registers and SRAM/VRAM to make the compiler emit the right instructions.
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// If dst and src point at different address spaces then they are guaranteed to not be aliased.
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template <int nbytes, int alignment = 0>
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static __device__ __forceinline__ void ggml_cuda_memcpy_1(void * __restrict__ dst, const void * __restrict__ src) {
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if constexpr (alignment != 0) {
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